0683dde5d3
cargo-xwin drives the Windows MSVC cross-compile via clang-cl, under which CMake sets MSVC=1 — causing libopus 1.3.1's `if(NOT MSVC)` guards to skip the per-file `-msse4.1` / `-mssse3` COMPILE_FLAGS that its x86 SIMD source files need. Clang-cl (unlike real cl.exe) still honors Clang's target-feature system, so those files then fail to compile with "always_inline function '_mm_cvtepi16_epi32' requires target feature 'sse4.1'" errors across silk/NSQ_sse4_1.c, NSQ_del_dec_sse4_1.c, and VQ_WMat_EC_sse4_1.c. Earlier attempts to fix this downstream (cargo-xwin toolchain file, override.cmake CMAKE_C_COMPILE_OBJECT <FLAGS> replace, CFLAGS env vars) all failed because cargo-xwin rewrites override.cmake from scratch on every `cargo xwin build` invocation and cmake-rs's -DCMAKE_C_FLAGS= assembly happens before toolchain FORCE sets propagate. Fixing it upstream at the source: vendor audiopus_sys 0.2.2 into vendor/audiopus_sys, patch its bundled opus/CMakeLists.txt to introduce an MSVC_CL var (true only when CMAKE_C_COMPILER_ID == "MSVC", i.e. real cl.exe), and flip the eight `if(NOT MSVC)` SIMD guards to `if(NOT MSVC_CL)`. Clang-cl then gets the GCC-style per-file flags and the SSE4.1 sources build cleanly. Also flip the `if(MSVC)` global /arch block at line 445 to `if(MSVC_CL)` so only cl.exe applies /arch:AVX and clang-cl relies purely on per-file flags (no global/per-file mixing). Wire via [patch.crates-io] in the workspace root Cargo.toml; the patch is resolved relative to the workspace root as `vendor/audiopus_sys`. Upstream context: xiph/opus#256, xiph/opus PR #257 (both stale). Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
108 lines
4.3 KiB
C
108 lines
4.3 KiB
C
/***********************************************************************
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Copyright (c) 2006-2011, Skype Limited. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of Internet Society, IETF or IETF Trust, nor the
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names of specific contributors, may be used to endorse or promote
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products derived from this software without specific prior written
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permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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***********************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "SigProc_FIX.h"
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/* Faster than schur64(), but much less accurate. */
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/* uses SMLAWB(), requiring armv5E and higher. */
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opus_int32 silk_schur( /* O Returns residual energy */
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opus_int16 *rc_Q15, /* O reflection coefficients [order] Q15 */
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const opus_int32 *c, /* I correlations [order+1] */
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const opus_int32 order /* I prediction order */
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)
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{
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opus_int k, n, lz;
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opus_int32 C[ SILK_MAX_ORDER_LPC + 1 ][ 2 ];
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opus_int32 Ctmp1, Ctmp2, rc_tmp_Q15;
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celt_assert( order >= 0 && order <= SILK_MAX_ORDER_LPC );
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/* Get number of leading zeros */
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lz = silk_CLZ32( c[ 0 ] );
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/* Copy correlations and adjust level to Q30 */
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k = 0;
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if( lz < 2 ) {
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/* lz must be 1, so shift one to the right */
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do {
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C[ k ][ 0 ] = C[ k ][ 1 ] = silk_RSHIFT( c[ k ], 1 );
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} while( ++k <= order );
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} else if( lz > 2 ) {
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/* Shift to the left */
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lz -= 2;
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do {
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C[ k ][ 0 ] = C[ k ][ 1 ] = silk_LSHIFT( c[ k ], lz );
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} while( ++k <= order );
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} else {
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/* No need to shift */
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do {
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C[ k ][ 0 ] = C[ k ][ 1 ] = c[ k ];
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} while( ++k <= order );
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}
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for( k = 0; k < order; k++ ) {
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/* Check that we won't be getting an unstable rc, otherwise stop here. */
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if (silk_abs_int32(C[ k + 1 ][ 0 ]) >= C[ 0 ][ 1 ]) {
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if ( C[ k + 1 ][ 0 ] > 0 ) {
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rc_Q15[ k ] = -SILK_FIX_CONST( .99f, 15 );
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} else {
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rc_Q15[ k ] = SILK_FIX_CONST( .99f, 15 );
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}
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k++;
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break;
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}
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/* Get reflection coefficient */
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rc_tmp_Q15 = -silk_DIV32_16( C[ k + 1 ][ 0 ], silk_max_32( silk_RSHIFT( C[ 0 ][ 1 ], 15 ), 1 ) );
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/* Clip (shouldn't happen for properly conditioned inputs) */
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rc_tmp_Q15 = silk_SAT16( rc_tmp_Q15 );
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/* Store */
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rc_Q15[ k ] = (opus_int16)rc_tmp_Q15;
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/* Update correlations */
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for( n = 0; n < order - k; n++ ) {
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Ctmp1 = C[ n + k + 1 ][ 0 ];
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Ctmp2 = C[ n ][ 1 ];
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C[ n + k + 1 ][ 0 ] = silk_SMLAWB( Ctmp1, silk_LSHIFT( Ctmp2, 1 ), rc_tmp_Q15 );
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C[ n ][ 1 ] = silk_SMLAWB( Ctmp2, silk_LSHIFT( Ctmp1, 1 ), rc_tmp_Q15 );
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}
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}
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for(; k < order; k++ ) {
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rc_Q15[ k ] = 0;
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}
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/* return residual energy */
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return silk_max_32( 1, C[ 0 ][ 1 ] );
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}
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