0683dde5d3
cargo-xwin drives the Windows MSVC cross-compile via clang-cl, under which CMake sets MSVC=1 — causing libopus 1.3.1's `if(NOT MSVC)` guards to skip the per-file `-msse4.1` / `-mssse3` COMPILE_FLAGS that its x86 SIMD source files need. Clang-cl (unlike real cl.exe) still honors Clang's target-feature system, so those files then fail to compile with "always_inline function '_mm_cvtepi16_epi32' requires target feature 'sse4.1'" errors across silk/NSQ_sse4_1.c, NSQ_del_dec_sse4_1.c, and VQ_WMat_EC_sse4_1.c. Earlier attempts to fix this downstream (cargo-xwin toolchain file, override.cmake CMAKE_C_COMPILE_OBJECT <FLAGS> replace, CFLAGS env vars) all failed because cargo-xwin rewrites override.cmake from scratch on every `cargo xwin build` invocation and cmake-rs's -DCMAKE_C_FLAGS= assembly happens before toolchain FORCE sets propagate. Fixing it upstream at the source: vendor audiopus_sys 0.2.2 into vendor/audiopus_sys, patch its bundled opus/CMakeLists.txt to introduce an MSVC_CL var (true only when CMAKE_C_COMPILER_ID == "MSVC", i.e. real cl.exe), and flip the eight `if(NOT MSVC)` SIMD guards to `if(NOT MSVC_CL)`. Clang-cl then gets the GCC-style per-file flags and the SSE4.1 sources build cleanly. Also flip the `if(MSVC)` global /arch block at line 445 to `if(MSVC_CL)` so only cl.exe applies /arch:AVX and clang-cl relies purely on per-file flags (no global/per-file mixing). Wire via [patch.crates-io] in the workspace root Cargo.toml; the patch is resolved relative to the workspace root as `vendor/audiopus_sys`. Upstream context: xiph/opus#256, xiph/opus PR #257 (both stale). Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
96 lines
3.1 KiB
C
96 lines
3.1 KiB
C
/* Copyright (c) 2014, Cisco Systems, INC
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Written by XiangMingZhu WeiZhou MinPeng YanWang
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <xmmintrin.h>
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#include <emmintrin.h>
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#include "macros.h"
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#include "celt_lpc.h"
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#include "stack_alloc.h"
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#include "mathops.h"
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#include "pitch.h"
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#if defined(OPUS_X86_MAY_HAVE_SSE2) && defined(FIXED_POINT)
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opus_val32 celt_inner_prod_sse2(const opus_val16 *x, const opus_val16 *y,
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int N)
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{
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opus_int i, dataSize16;
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opus_int32 sum;
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__m128i inVec1_76543210, inVec1_FEDCBA98, acc1;
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__m128i inVec2_76543210, inVec2_FEDCBA98, acc2;
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sum = 0;
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dataSize16 = N & ~15;
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acc1 = _mm_setzero_si128();
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acc2 = _mm_setzero_si128();
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for (i=0;i<dataSize16;i+=16)
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{
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inVec1_76543210 = _mm_loadu_si128((__m128i *)(&x[i + 0]));
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inVec2_76543210 = _mm_loadu_si128((__m128i *)(&y[i + 0]));
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inVec1_FEDCBA98 = _mm_loadu_si128((__m128i *)(&x[i + 8]));
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inVec2_FEDCBA98 = _mm_loadu_si128((__m128i *)(&y[i + 8]));
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inVec1_76543210 = _mm_madd_epi16(inVec1_76543210, inVec2_76543210);
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inVec1_FEDCBA98 = _mm_madd_epi16(inVec1_FEDCBA98, inVec2_FEDCBA98);
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acc1 = _mm_add_epi32(acc1, inVec1_76543210);
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acc2 = _mm_add_epi32(acc2, inVec1_FEDCBA98);
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}
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acc1 = _mm_add_epi32( acc1, acc2 );
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if (N - i >= 8)
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{
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inVec1_76543210 = _mm_loadu_si128((__m128i *)(&x[i + 0]));
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inVec2_76543210 = _mm_loadu_si128((__m128i *)(&y[i + 0]));
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inVec1_76543210 = _mm_madd_epi16(inVec1_76543210, inVec2_76543210);
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acc1 = _mm_add_epi32(acc1, inVec1_76543210);
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i += 8;
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}
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acc1 = _mm_add_epi32(acc1, _mm_unpackhi_epi64( acc1, acc1));
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acc1 = _mm_add_epi32(acc1, _mm_shufflelo_epi16( acc1, 0x0E));
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sum += _mm_cvtsi128_si32(acc1);
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for (;i<N;i++) {
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sum = silk_SMLABB(sum, x[i], y[i]);
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}
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return sum;
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}
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#endif
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